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Computer Science  1.  For the following code snippet,   a code segment for a modern
                    Revision Exercise 2
                                                         processor.  The code involves
                                                         multiple loops and calculations.

                                                         How would you approach this task,
                trace the execution steps (such as
          FOR ONLINE READING ONLY
                fetch, decode, execute, memory
                                                         unrolling, instruction scheduling,
                access, write back) in both a non-       considering the concepts of loop
                                                         and data dependence analysis?
                pipelined and a pipelined processor      Briefly outline your strategy.
                (assuming no hazards). Compare
                the number of clock cycles it takes   6.  Investigate the impact of cache size
                to complete the instructions in both     and memory access patterns on the
                scenarios. Explain the speedup           effectiveness of loop unrolling.
                achieved through pipelining.          7.  Research real-world compiler

                Code snippet                             optimisation techniques related to
                                                         data dependence analysis (beyond
                lw $t0, 4($s3) # Load value from         the basic example provided).
                memory to $t0                            Explain, in your own words, how

                sub $t1, $t0, $s4 # Subtract $s4         data dependence analysis helps
                from loaded value to $t1                 compilers exploit ILP effectively.
             2.  Research the concept of forwarding   8.  Discuss two potential benefits and
                in pipelined processors. Briefly         two trade-offs associated with using
                explain how forwarding can be            superscalar processors compared to
                used to address data hazards and         scalar processors.
                potentially improve performance       9.  Imagine you are a computer
                compared to stalling.                    architect tasked with designing the

             3.  Imagine you are a computer              next generation of processors. How
                architect. How might future              could you leverage the concepts
                processor designs enhance ILP            of superscalar execution and ILP
                techniques?                              beyond simply increasing the
             4.  Research and compare two different      number of execution units? Briefly
                architectures (Such as, VLIW and         describe your innovative approach.

                Superscalar)  that  exploit  ILP.     10. Assume the initial BHT prediction is
                Summarise their key differences and      “Strongly taken” (11). Analyse the
                advantages in a short presentation.      differences in prediction behavior
             5.  Imagine you are a compiler              compared to an initial prediction
                developer working on optimising          of  “Strongly not taken” scenario.


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     Computer Science Form 5.indd   122                                                     23/07/2024   12:33
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