Page 24 - Computer_Science_F5

Truth tables Table 1. 3: Truth table with two (2) variables
A B
A truth table is a table used to represent 0 0 Chapter One: Computer architecture
the Boolean expression of the given
logic circuit. It is used to show all 0 1
FOR ONLINE READING ONLY
possible combinations of the inputs and 1 0
outputs of a given logic circuit. You must 1 1
evaluate the Boolean expression for all
possible combinations of values for the For three variables, A, B, and C, variable
input variables as part of the method.
A has four (4) zeros and four (4) ones,
followed by two (2) ones and two (2)
Construction of truth tables zeros for variable B. Lastly, variable C
The construction of a truth table involves has alternating zeros and ones as shown
some steps depending on the number of in Table 1.4.
inputs. The following steps are used to
construct a truth table: Table 1.4: Truth table with three (3)

Step 1: Determine the number of variables
variables for a given Boolean A B C
expression, whereby, for n
variables, the number of rows 0 0 0
will be 2 . For example, the 0 0 1
n
truth table will need 2 = 4 rows 0 1 0
2
for two variables, A and B. The 0 1 1
variables must have all possible 1 0 0
combinations of 1 and 0. 1 0 1
Note: When you set up the truth table, 1 1 0
always make the first column
(whether a 4, 8, or 16-row table) 1 1 1
half zeros (0). (1 half) and Step 2: Identify the variables and every
st
half ones (1) (2 half). Before possible combination of 1 and 0
nd
switching to 0’s, write half as for each variable.
many consecutive 1’s in the
next column as you did first. For Step 3: Create a new column for each
instance, the truth table that has term of the Boolean expression.
two variables A and B, as shown Step 4: Compare the two statements.
in Table 1.3, variable A has
two (2) zeros and two (2) ones Note: The two statements are
followed by alternating ones equivalent if their truth tables
and zeros for variable B. have the same value.

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Student’s Book Form Five

Computer Science Form 5.indd 15 23/07/2024 12:32