Page 70 - Computer_Science_F5

Activity 1.15:

Register and ISA interaction Chapter One: Computer architecture

Aim:
FOR ONLINE READING ONLY
To enhance individual comprehension of the inner workings of a CPU and how
registers facilitate efficient data processing and manipulation within the context
of the ISA

Materials:
Computer with Internet access, Open source CPU simulator (MARS or QEMU).

Instructions:
Explore how registers interact with the Instruction Set Architecture (ISA) within a
CPU. Use CPU simulator or any other tool, observe register usage during program
execution so as to understand the interplay between registers and ISA instructions

Step 1: Download the MARS CPU simulator which is designed for MIPS and
RISC-based ISA from https://courses.missouristate.edu/kenvollmar/
mars/ (RISC-based ISAs) and install.
Step 2: Load a sample program as shown below which is a basic example written
in MIPS assembly language for the MARS simulator. It demonstrates
the use of General Purpose Registers (GPRs) for calculations and storing
data.

# Define constants
ADD_VALUE equ 10
SUB_VALUE equ 5

# Load values into registers
li $t0, ADD_VALUE # Load 10 into $t0
li $t1, SUB_VALUE # Load 5 into $t1

# Perform operations and store results
add $s0, $t0, $t1 # Add values in $t0 and $t1, store in $s0
sub $s1, $t0, $t1 # Subtract values in $t0 and $t1, store in $s1

# Program terminates here (implicit in MARS)

Step 3: Open MARS and create a new file. Paste the provided code into the
editor window.

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Student’s Book Form Five

Computer Science Form 5.indd 61 23/07/2024 12:32