Page 72 - Computer_Science_F5
P. 72
phase. Assume register r2 contains the in this phase are; Control Unit, and
value 5 and register r3 contains the value Instruction Register (IR).
6. Therefore, at the end of the cycle,
register r1 should contain the value 11. (c) Read Operands Chapter One: Computer architecture
This phase is necessary for instructions
FOR ONLINE READING ONLY
(a) Fetching of instruction that require operands (data to be
In this phase, the CPU retrieves an manipulated). Example of instructions that
instruction from memory. The Program require operands are arithmetic and logic
Counter (PC) register holds the instructions (such as add, subtract, and
address of the next instruction to be multiply), and data transfer instructions
fetched. The Control Unit instructs the (such as load, store, move). Examples of
datapath to read the memory location instructions that do not require operands
pointed to by the PC and then load the include; jump instructions, and branch
fetched instruction (add r1, r2, r3) into instructions. Therefore, add r1, r2, and
the Instruction Register (IR). Datapath r3, requires operands.
elements involved in this phase are; PC,
Memory, Instruction Register (IR), and The Control Unit uses the register names
Control Unit. (rs and rt) identified during decode to
locate the corresponding registers within
(b) Decoding the instruction the register file. The values from these
The Control Unit analyses the instruction registers (r2 and r3 in this example) are
in the IR. It breaks down the instruction loaded into temporary holding registers
into its key parts. Opcode - this specifies within the CPU for the ALU to access
the operation to be performed (in this during execution. Datapath elements
case, “add”). Operands - these are the involved include; the Control Unit,
data elements involved in the operation, Register File and data memory (if the
identified by their register names. operand is in memory).
(i) Source register (rs): this operand
will be used as the first input to the (d) Execute
ALU r2 in this instruction). This is where the actual calculation
(ii) Destination register (rt): this operand happens. The Control Unit activates
will be used as the second input to the the ALU (Arithmetic Logic Unit).
ALU and will also store the result of The ALU takes the operands from the
the operation (r3 in this instruction). temporary registers and performs the
addition based on the opcode (“add”).
Based on this information, the Control The result of the addition (11) is stored
Unit generates control signals to activate in a a temporary register. Datapath
specific datapath elements for the next elements involved in this phase are the
phase. Datapath elements involved Control Unit, ALU, and Registers file.
63
Student’s Book Form Five
Computer Science Form 5.indd 63 23/07/2024 12:32