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processors by allowing multiple instructions within a sequence. These
instructions to be executed independent instructions can then be
simultaneously or out-of-order. This reordered to be executed in parallel
can help to improve the performance on different execution units within

of multi-threaded applications and the processor. This technique requires
FOR ONLINE READING ONLY
other parallel processing tasks. careful analysis to ensure proper Chapter Two: Performance and optimisation of computer processor
program behaviour is maintained.

Exercise 2.4 Loop unrolling

1. How identifying data dependencies This technique duplicates the loop body
within a program impact ILP? a certain number of times to expose
Explain with an example. more potential parallelism within the
loop. Consider the following simple C
2. Design a simple flow chart code that adds two numbers 10 times.
illustrating the sequential and
ILP execution of a program for (int i = 0; i < 10; i++) {
segment that subtracts two result += a + b;
numbers.
3. Discuss the advantages and }
disadvantages of hardwareand
software-based approach to ILP. Without loop unrolling, the processor
adds a and b, stores the result, and then
4. Discuss the potential disadvantages repeats the process for each loop iteration
of ILP in real-world scenarios. sequentially. Each iteration might

involve fetching instructions, reading
operands from memory, performing
Compilation techniques for ILP the addition, and storing the result
The software-based approach to back in memory. Consider a 5-stage
ILP relies on compilers to identify pipeline: Fetch (instruction), Decode,
parallelism within a program code Read operands, Execute (addition), and
during compilation before the program Write result. Without Loop unrolling,
runs. Compiler techniques used include the processor goes through the pipeline
instruction scheduling, loop unrolling for each addition: Fetch (1 cycle) ->
and data dependence analysis. Decode (1 cycle) -> Read operands (a &
b) (1 cycle) -> Execute (add) (1 cycle)
Instruction scheduling -> Write result (1 cycle), resulting to 5
Another compilation technique for ILP cycles per iteration. As shown in Table
2.3, since there are 10 iterations, the
is instruction scheduling. Compilers can total execution time in a 5-stage pipeline
analyse the code to identify independent
would be 14 cycles.

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Student’s Book Form Five

Computer Science Form 5.indd 99 23/07/2024 12:33