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Computer Science Step 2: Assume no forwarding has (d) Code listings: Clearly presented
the pipeline stages, timing, and
performance comparisons.
been implemented in the
pipeline.
(a) Analyse the code and
original and reordered MIPS code
FOR ONLINE READING ONLY
identify dependencies
(hint: draw the timing segments.
diagram)
(b) Re-order the instructions Exercise 2.5
to facilitate ILP 1. Consider the loop unrolling
(c) Assess the performance example in the text. Explain why
gain of re-ordering loop unrolling might not always be
instructions beneficial. What are some potential
drawbacks of loop unrolling?
Step 3: Assume forwarding has been
implemented in the pipeline. 2. Imagine a loop that iterates 100
times, performing a multiplication
(a) Analyse the code and (a * b) and storing the result
identify dependencies in a variable (c). How much
(b) Re-order the instructions improvement in execution cycles
to facilitate ILP could loop unrolling (factor of 4)
Step 4: Assess the performance achieve, assuming a 5-stage pipeline
gain of forwarding and re- and perfect pipelining conditions?
ordering instructions Explain your calculations.
Deliverables
A comprehensive report comprising Scalar versus superscalar
of the following: pipelining
(a) A concise summary of the key In scalar pipelining, the processor has
findings from the activity, including a single execution unit for handling
the impact of instruction reordering instructions offering limited parallelism
and forwarding on pipeline as only one instruction can be executed at
performance; a time in the single execution unit, as seen
(b) Insights and recommendations- in Figure 2.10, Superscalar pipelining is a
Insights gained from the activity more advanced technique that builds upon
and recommendations for handling scalar pipelining to exploit Instruction
data dependencies in processor Level Parallelism (ILP) within a program.
pipelines. The processor has multiple execution
(c) Diagrams and tables: Well-labeled units (typically 2, 4, or even more) that
diagrams and tables to illustrate can execute instructions concurrently.
102
for Advanced Secondary Schools
Computer Science Form 5.indd 102 23/07/2024 12:33
